The invention relates to processing of analog signals. In particular, the invention relates to analog to digital conversion of analog signals using timestamps of characteristic signal events.
Analog signals are generated by and/or used in a wide variety of devices and systems. In many of these systems, the analog signals serve as a means of transferring information from one portion of the system to another. Devices that make up systems employing analog signals function to generate, modify, receive and/or detect the analog signals. Examples of systems or devices that make use of analog signals include sensors for monitoring environmental or other system conditions and a wide variety of different communications systems.
In many practical situations encountered in the real world, it is necessary or at least desirable to transform analog signals into a digital representation. This is especially true in cases where digital methodologies are used largely to process and analyze the analog signals. For example, most manufacturers of integrated circuits (ICs) employ some form of automated test equipment (ATE) to test the IC products being manufactured. While ATEs are overwhelmingly implemented based on digital technologies, many of the modem ICs that are being manufactured and tested, produce or use analog output signals. This has become particularly true as modem system-on-a-chip devices are transitioned from the concept to the product phase. The problem for the designers and users of ATEs is how to transform analog signals into a format that can be utilized by the digital ATE. A related problem is the reconstruction of the analog signal from the digital representation.
The conventional approach to converting an analog signal into a digital representation is to use an analog to digital converter (ADC). Conventional ADCs sample the amplitude of the analog signal or waveform at successive, regularly spaced, points in time. The sampled amplitude values are converted to a digital format (i.e., digitized) by one of several approaches well known in the art. Once digitized, the analog signal is represented by a sequence of digital values representing the amplitudes sampled by the ADC. Normally, timing of the digital values in the amplitude sequence is known implicitly from the conversion scheme being used. Among the commonly employed ADC approaches known in the art are the over-sampling converters, such as the delta-sigma modulator-based ADCs, the successive approximation ADCs, and the so-called flash ADCs. Each of these technologies ultimately produces a string of digital words, each word representing a sampled amplitude value in digital form, in a time sequence at regularly spaced time intervals.
The analog signal can be reconstructed from the digital words produced by the conventional ADC using a digital to analog converter (DAC). The DAC xe2x80x98readsxe2x80x99 or processes each successive digital word in the time-sequence and produces an analog voltage level at a DAC output port that corresponds to each of the words. By reading the digital words in a manner that is consistent with the order and timing of the original analog to digital conversion, the DAC can accurately reconstruct the analog signal.
While conventional amplitude sampled analog to digital conversion or amplitude sequence analog to digital conversion can provide high fidelity conversion of analog signals to a digital form, the conventional ADCs can be costly to implement in some instances. In particular, many of the conventional ADC technologies are not well suited for simple, accurate on-chip implementations. This is especially true when considering on-chip conversion of analog signals for built-in-self-test (BIST) purposes or in design for test (DFT) instances used in conjunction with an external digital ATE. Similarly, the use of conventional ADC approaches as an interface between an analog device and an ATE can pose many problems, not the least of which is the need for extra dedicated resources in the ATE to accommodate the often high data rate digital signals generated by a conventional time-sampling ADC. Finally, the bandwidth of many conventional ADCs is severely limited by the circuitry necessary to affect the analog to digital conversion, especially when many bits of amplitude accuracy are desired.
Accordingly, it would be advantageous to have a method and apparatus for transforming an analog signal into a digital representation that preserved key characteristics of the analog signal and that could optionally provide for accurate signal reconstruction from the digital representation. In addition, it would be beneficial if such a method and apparatus could be applied to any analog signal, had high bandwidth capability, and could be implemented efficiently either on-chip or off-chip. Such a method and apparatus would solve a long-standing need in the area of analog to digital signal conversion, especially as the conversion relates to processing and testing of analog signals by digital systems such as ATEs.
The present invention is a novel method and apparatus for converting analog signals into a digital representation consisting of timestamps. The digital representation of the analog signal produced by the method and apparatus of the present invention is based on a time sequence and not on a conventional amplitude sequence. Instead, the method and apparatus of the present invention produces a sequence of digitized time samples at or corresponding to the occurrence of a set of predetermined amplitude events within the analog signal. In other words, the present invention maps the analog signal to a series of events and records the time of occurrence of these events. The events according to the present invention are defined by an amplitude relationship between an analog signal or signal under test (SUT) and one or more time-varying reference signals. The time record of the occurrence of the events produced by the method and apparatus of the present invention is, or at least can be thought of as, a sequence of timestamps. The timestamp sequence generated for an analog signal by the method and apparatus of the present invention combined with knowledge of the events associated with the timestamp sequence can provide enough information to allow the reconstruction of the signal from the timestamps.
In one aspect of the present invention, a method of converting an analog signal into a timestamp representation is provided. In particular, the analog signal may be either a signal produced at an output of a device under test, a signal internal to the device under test, or a signal received from an unspecified analog signal source. The method comprises the step of generating a quantity N of timing-varying reference signals. The quantity N is an integer equal to or greater than one. The method further comprises the step of comparing the analog signal to the quantity N of time-varying reference signals. During the step of comparing a determination is made as to whether an amplitude of the analog signal is greater than, equal to, or less than one or more of amplitudes of the N time-varying reference signals. The method further comprises the step of producing a timestamp each time the analog signal amplitude is determined to be equal to the amplitude of one of the time-varying reference signals. The method of converting further comprises an optional step of storing the timestamps and an optional step of reconstructing the analog signal from the timestamps. Furthermore, the step of comparing comprises either simultaneously comparing the analog signal to the quantity N of reference signals in parallel or sequentially comparing the analog signal to each one of the quantity N of reference signals until all of the reference signals have been compared.
In a preferred embodiment, the step of producing a timestamp comprises the step of establishing logic levels in a quantity N of digital signals, one digital signal corresponding to each different one of the N reference signals. A first logic level is established separately in each of N digital signals while the analog signal amplitude is greater than the amplitude of corresponding ones of the N reference signals. A second logic level is established separately in each of the digital signals while the analog signal amplitude is less than the amplitude of the corresponding ones of N reference signals. A transition between the first and second logic levels in the digital signal is a timestamp that marks the time when the analog signal amplitude equals the amplitude of the corresponding reference signal.
In the preferred embodiment, the method of converting an analog signal still further comprises the optional step of measuring and creating a digital timestamp corresponding to the time of transition between the first and second logic levels. In another embodiment, the timestamp produced in the step of producing is a digital word generated directly from the results of the step of comparing. For example, the digital word may be generated by a timing interval analyzer (TIA).
The steps of producing and comparing are performed until the digital signal comprises representations for a plurality of analog signal amplitude events. In general, how many amplitude events are included in the plurality is determined by a tradeoff between test time and test quality. One skilled in the art can readily determine for a given test situation and a given signal under test a sufficient number of amplitude events for the plurality without undue experimentation.
In another aspect of the invention, an apparatus for converting an analog signal into a quantity N of digital signal representations is provided. In particular, the analog signal may be either a signal produced at an output of a device under test (DUT), a signal internal to the DUT, or a signal received from an unspecified analog signal source. The apparatus comprises an apparatus input, a reference signal source, a quantity N of comparators and a quantity N of apparatus outputs, where N is an integer equal to or greater than one. The reference signal source generates a quantity N of time-varying reference signals, the reference signals being different from one another. Each comparator has a first input, a second input and an output. The first input of each comparator is connected to the apparatus input and receives an analog signal, wherein the amplitude of the analog signal varies as a function of time. The second input of each comparator receives a different one of the quantity N reference signals generated by the reference signal source. Each comparator produces a digital signal at the comparator output. The output of each comparator is connected to a different one of the N apparatus outputs. The apparatus can be implemented as a stand-alone unit or it can be incorporated into a device as part of onboard built-in-test circuitry.
In an alternate embodiment, an apparatus for converting an analog signal into a digital signal representation is provided. In the alternate embodiment, the apparatus comprises an apparatus input, a reference signal source, a comparator and an apparatus output. The reference signal source sequentially generates a quantity N of time-varying reference signals, each reference signal in the sequence being different from other ones of the reference signals and each reference signal being generated for a finite period of time. The comparator has a first input, a second input and an output. The first input of the comparator is connected to the apparatus input and receives an analog signal, wherein the amplitude of the analog signal varies as a function of time. The second input of the comparator is connected to the reference signal source and receives the sequence of reference signals generated by the reference signal source. The comparator produces a digital signal at the comparator output, the digital signal being dependent on a comparison between the analog signal and each of the reference signals sequentially with respect to time. The apparatus can be implemented as a stand-alone unit or it can be incorporated into a device as part of onboard built-in-test circuitry.
In yet another aspect of the present invention, a system for converting an analog signal into a digital representation is provided. The system comprises the analog to digital conversion apparatus of the present invention. The apparatus has an input that receives an analog signal and a quantity N of apparatus outputs, where N is an integer equal to or greater than one. The apparatus compares the analog signal to a quantity N of time-varying reference signals and produces one of a quantity N of digital signals at each apparatus output. The logic states of the digital signals are determined by the comparisons. The system further comprises a quantity N of transition interval analyzers (TIAs). Each TIA has an input and an output, such that each apparatus output is connected to the input of one TIA. Each TIA encodes timing of logic transitions in a respective digital signal. Optionally, the system further comprises a test system for testing a device under test having a quantity N of ports. Each port of the test system is connected to the output of one TIA. The test system uses the encoded timing information in the digital signals from the TIAs as timestamps of events in the analog signal to determine if the device under test meets specifications.